Emulation vs. Prototyping: What’s the Difference?
If you work in hardware verification, you’ve probably heard about simulation, emulation, and prototyping. You probably already know what simulation is: you run your RTL design on your computer and test it using a verification environment. But what about emulation and
SoC vs. Chiplets: What’s the Difference?
In the world of hardware design, you’ve probably heard the terms System-on-Chip (SoC) and chiplets. Both are critical to how modern devices are built, but they take very different approaches to solving design challenges. So, what’s the difference? And why are
PCIe vs. CXL vs. UCIe
Many years ago, my first project was related to PCIe Gen 3. Before that, I only encountered simple protocols UART, JTAG, and APB. I still remember opening the PCIe spec, which had more than thousands of pages of hieroglyphs. How
SoC Verification VS Traditional (UVM) verification
"But why can't I just use our UVM testbench to verify SoC behavior?" I often hear junior engineers or those who have not worked on SoC verification before, asking some variant of this question. In this article, I attempt to very simplyexplain
A High-Level Look at Common Protocols Used In Electronic Systems
Recently, I noticed I often have to remind myself of the proper usage and key features of various protocols. I’ve put together a high-level overview of the common protocols used in modern electronic systems to simplify things. For further details, a quick
Here’s How To Beat Fear of Interviews
John is a verification engineer with seven years of experience. He has successfully completed multiple projects in his career and has also led a team of five people. However, despite having a clear track record of being good at his
Verification engineers: how to become an expert in sending emails
What if I told you how you write emails is as important as your debugging skills? Sounds too much? Stay with me, and in this blog, you will learn why.A very simplified flow of verification daily work is: write some
Being a verification engineer – why it’s a great career choice
In this blog post I explain why according to Job Characteristic Model, picking career as a verification engineer is a great choice.
You will encounter these challenges in your career and why they are good for your development
In this post I present various situations that will with high probability happen during the career of verification engineer.
Verification engineers: framework for efficient execution of any task
In this post I explain how to approach any verification task you receive.